Nvidia 与 MediaTek 扩展合作，将定制芯片接入 NVLink 机柜

Senior News Writer,Data Center Knowledge

August 31, 2026

4 Min Read

Nvlink Fusion photo

Nvlink Fusion photo via Nvidia

Nvidia is opening its rack-scale AI infrastructure to custom accelerators from hyperscalers and other AI developers, expanding NVLink technology beyond Nvidia’s own processors. Through an expanded partnership with MediaTek, customers can design their own AI accelerators (XPUs) on a pre-validated NVLink Fusion platform and integrate them into Nvidia-connected AI factory infrastructure built around the Modular GPU Accelerated (MGX) ecosystem.

Nvidia also invested $3.5 billion in convertible bonds issued by MediaTek.

“Ultimately, this gives customers more freedom to innovate without having to rebuild the entire AI factory around custom silicon,” said Dion Harris, senior director of HPC and AI hyperscale infrastructure solutions at Nvidia, during a media Q&A on Monday.

Customer Chips and AI Factories

The announcement comes as hyperscalers develop their own processors for AI workloads. AWS has Trainium and Inferentia, Google has TPUs, and Microsoft has developed Maia accelerators. Nvidia’s strategy is to make that custom silicon interoperable with its rack-scale stack.

Nvidia says NVLink Fusion provides a pre-validated foundation for bringing custom XPUs into Nvidia-connected AI factories. The platform combines NVLink Fusion connectivity with NVLink-C2C, high-bandwidth memory (HBM), and chiplet technologies. Customers can use Nvidia intellectual property for elements of their systems while retaining control over their custom accelerator designs.

“Customers can focus on differentiated compute,” Harris said.

MGX, Nvidia’s modular server and rack reference architecture, underpins the rack-scale infrastructure around these processors. “We’ve built out this incredible ecosystem, which is what we call MGX, that now all these customers can tap into, and they don’t have to go and reinvent the wheel,” Harris said.

MediaTek’s Role

MediaTek will provide system-on-chip (SoC) design and packaging capabilities for custom XPU customers, while Nvidia provides connectivity and rack-scale infrastructure technologies.

“Production AI factories require packaging, HBM, I/O, and networking,” Harris said. Customers also have to qualify and certify rack-scale systems at data center scale.

The companies did not identify customers developing XPUs through their relationship with MediaTek or announce any specific data center deployments.

Heterogeneous AI

As AI infrastructure diversifies, analysts expect a broader mix of processors, especially as inference workloads grow.

“Heterogeneity is the future of AI,” said Matt Kimball, vice president and principal analyst at Moor Insights & Strategy. That includes custom silicon from hyperscalers such as AWS and Google, as well as specialized accelerators from other vendors.

Those processors need high-speed, scale-up connections to communicate within large systems. “There are effectively three options,” Kimball said. “Scale-up Ethernet, NVLink Fusion, and UALink.” Ethernet is the established approach for data center networking; NVLink Fusion is Nvidia’s proprietary scale-up technology; UALink is an open standard being developed by a group of chip and infrastructure companies with AMD among its supporters.

“These fabrics are to make scale-up easier and more performant,” Kimball said. “[All] require broad ecosystem support to be meaningful.”

Building the NVLink Ecosystem

Nvidia announced NVLink Fusion in May 2025 and has since expanded the number of companies supporting the technology. According to Kimball, MediaTek joins companies such as Astera Labs, Marvell, Samsung, and AIchip in supporting NVLink Fusion for custom silicon, with Arm, Intel, Qualcomm, and SiFive having announced support on the CPU side.

Harris said Nvidia’s goal is to make the technology available to a broad range of customers: “This will be available to all of MediaTek’s custom XPU partners.”

Harris added that AWS plans to use a mix of its own processors and Nvidia infrastructure, including NVLink-C2C and NVLink switch technology.

The licensing model for NVLink Fusion has not been disclosed. “There will be some licensing elements in place,” Harris noted.

UALink Challenges NVLink

UALink provides an open-standard alternative to Nvidia’s proprietary interconnect technology. AMD is among the companies championing UALink and is incorporating it into its Helios rack-scale AI platform. Helios combines 72 AMD MI455X accelerators with Epyc processors and Pensando networking. In this model, UALink is used for scale-up connectivity, while Ethernet-based networking handles scale-out.

The competing approaches reflect a broader effort to connect increasing numbers of accelerators within AI systems.

Nvidia’s strategy is to make NVLink available beyond Nvidia GPUs. “Nvidia is an AI infrastructure company,” Harris said. “Customers need different architectures for different workloads.”

Beyond the Accelerator

Nvidia is expanding NVLink beyond GPU-to-GPU connectivity. Harris said NVLink-C2C can connect CPUs and GPUs at the chip level, while NVLink switch technology provides scale-up connectivity among processors. For scale-out networking, Nvidia employs Spectrum-X Ethernet and InfiniBand, positioning those as complementary parts of its networking stack.

When asked whether Nvidia’s longer-term objective is to control AI infrastructure architecture regardless of which accelerator is inside the rack, Harris said it’s not about ownership. “It’s really about being able to take all the technologies that we've built over the last several decades, and offering that to the ecosystem,” he said.

The MediaTek partnership also extends beyond data center infrastructure. The companies are continuing work on local AI computing, including future RTX Spark and DGX PC platforms, as well as automotive systems using MediaTek technology with Nvidia AI and graphics.

For data centers, the immediate expansion centers on NVLink Fusion and its support for custom accelerators from MediaTek’s customers.

About the Author

Senior News Writer, Data Center Knowledge

Shane Snider is Senior News Writer at Data Center Knowledge, covering AI infrastructure, hyperscale data centers, cloud platforms, and the power and energy systems driving modern compute expansion. His reporting focuses on the operational, economic, and environmental forces reshaping digital infrastructure, including AI factories, utility constraints, liquid cooling, renewable energy procurement, and next-generation data center architectures. He has won recent Azbee awards for news series and government reporting. Based in Raleigh, North Carolina, Snider covers how hyperscalers, utilities, chipmakers, and infrastructure providers are responding to the rapid rise of AI workloads and global compute demand.

You can reach Shane at [email protected] or on LinkedIn.